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Volume 17 (2024)
Authors:
Shota Nakabeppu, Nobuyuki Yamasaki
Title:
A Learning-based Control Scheme for MTJ-based Non-volatile Flip-Flops
Volume 16 (2023)
Authors:
Ippei Tanaka, Naoyuki Miyagawa, Tomoya Kimura, Takashi Imagawa, Hiroyuki Ochi
Title:
A CMOS-compatible Non-volatile Memory Element using Fishbone-in-Cage Capacitor
Volume 15 (2022)
Authors:
Mingfei Yu, Yukio Miyasaka, Masahiro Fujita
Title:
Parallel Scheduling Attention Mechanism: Generalization and Optimization
Volume 14 (2021)
Authors:
Tamon Sadasue, Takuya Tanaka, Ryosuke Kasahara, Arief Darmawan, Tsuyoshi Isshiki
Title:
Scalable Hardware Architecture for fast Gradient Boosted Tree Training
Volume 13 (2020)
Authors:
Ryota Ishikawa, Masashi Tawada,Masao Yanagisawa, Nozomu Togawa (Waseda University)
Title:
Scalable Stochastic Number Duplicators for Accuracy-flexibleArithmetic Circuit Design
Volume 12 (2019)
Authors:
Salita Sombatsiri (Osaka University), Seiya Shibata, Yuki Kobayashi, Hiroaki Inoue, Takashi Takenaka, Takeo Hosomi (NEC Corporation), Jaehoon Yu (Osaka University), Yoshinori Takeuchi (Kindai University)
Title:
Parallelism-flexible Convolution Core for Sparse Convolutional Neural Networks on FPGA
Volume 11 (2018)
Author:
Kenshu Seto (Tokyo City University)
Title:
Scalar Replacement with Polyhedral Model
Volume 10 (2017)
Authors:
Ahmed Awad, Atsushi Takahashi (Tokyo Institute of Technology), Satoshi Tanaka, Chikaaki Kodama (Toshiba Corporation)
Title:
Intensity Difference Map (IDM) Accuracy Analysis for OPC Efficiency Verification and Further Enhancement
Volume 9 (2016)
Authors:
Atsushi Hashimoto, Nagisa Ishiura (Kwansei Gakuin University)
Title:
Detecting Arithmetic Optimization Opportunities for C Compilers by Randomly Generated Equivalent Programs
Volume 8 (2015)
Authors:
Takaaki Miyajima (Keio University), David Thomas (Imperial College London), Hideharu Amano (Keio University)
Title:
Courier: A Toolchain for Application Acceleration on Heterogeneous Platforms
Volume 7 (2014)
Authors:
Shingo Kusakabe, Kenshu Seto (Tokyo City University)
Title:
Forwarding Unit Generation for Loop Pipelining in High-Level Synthesis
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